The present invention relates to the field of semiconductor devices and their manufacture. More specifically, in one embodiment the present invention provides high performance semiconductor devices such as bipolar transistors as well as an improved method for their manufacture.
Bipolar semiconductor devices and their methods of manufacture are well known. Such devices are described in, for example, U.S. Pat. No. 4,609,568 (Koh et al.) and U.S. Pat. No. 4,764,480 (Vora), both assigned to the assignee of the present invention and incorporated herein by reference for all purposes.
Certain problems have arisen in the manufacture of semiconductor devices according to the prior art, however. For example, field oxide encroachment increases device area and, therefore, parasitic capacitance and resistance of devices. Further, previous single polysilicon bipolar devices have had high extrinsic base resistance and large collector-base capacitance. Still further, previous bipolar devices have silicide only on the upper portion of a polysilicon region used for a local interconnect. This results in particularly unacceptable resistance when polysilicon line widths are decreased. Still further, thermal cycles in existing processes create relatively deep junctions which limit the speed of devices. Still further, the packing density of previous bipolar devices has been limited by the area required for interconnect.
Accordingly it is seen that improved semiconductor devices as well as improved methods for their manufacture are desired.